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![3.7 Truth Table - Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL [Book]](https://www.oreilly.com/api/v2/epubs/9780470900550/files/images/ch003-f002.jpg "3.7 Truth Table - Introduction to Digital Systems: Modeling, Synthesis, and Simulation Using VHDL [Book]")
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